Method and apparatus for operating a delta sigma ADC circuit

Coded data generation or conversion – Converter compensation

Reexamination Certificate

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C341S155000, C341S143000

Reexamination Certificate

active

07129866

ABSTRACT:
An analog-to-digital converter (ADC) system that converts an analog input signal into a digital output circuit includes a first stage analog-to-digital converter circuit coupled with a second stage analog-to-digital converter circuit. The first stage analog-to-digital converter circuit includes a quantizer, comparator, integrator, and a feedback digital-to-analog converter (DAC). The second stage analog-to-digital converter circuit includes a backend ADC that further quantizes the integrator output. Furthermore, the first stage analog-to-digital converter circuit also includes redundancy that corrects comparator offsets and prevents nonlinearities and harmonic distortion in the second stage analog-to-digital converter circuit caused by uncorrected comparator offsets.

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Siragusa et al., “Gain Error Correction Technique for Pipelined Analogue-to-Digital Converters,” Electronics Letters, vol. 36, No. 7, Mar. 30, 2000.
Siragusa et al., “A Digitally Enhanced 1.8-V 15-bit 40-MSample/s CMOS Pipelined ADC,” IEEE Journal of Solid-State Circuits, vol. 39, No. 12, Dec. 2004.
Qin et al., “Sigma-Delta ADC with Reduced Sample Rate Multibit Quantizer,” IEEE Transactions on Circuits and Systems-II Analog and Digital Signal Processing, vol. 46, No. 6, Jun. 1999, 824-828.

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