Patent
1995-06-22
1996-06-11
Lane, Jack A.
395460, 395464, G06F 1212
Patent
active
055265057
ABSTRACT:
Disclosed is a circuit which selects one of the elements of a translation lookaside buffer for replacement while excluding all other elements that are eligible for replacement. The circuit divides the entries into major groups and further sub-divides each major group into minor groups of elements. Each element within each minor group examines the previous major group, the previous minor group, and the previous entry within the minor group to determine whether an element has already been selected. The circuit will select an entry only if no previous entry within the minor group has been selected, no previous minor group has been selected, and no previous major group has been selected.
REFERENCES:
patent: 4802086 (1989-01-01), Gay et al.
patent: 5329627 (1994-07-01), Nanda et al.
Ward et al., Computation Structures, 1990, pp. 480-490.
E. DeLano, W. Walker, J. Yetter and M. Forsyth, "A High Speed Superscalar PA-RISC Processor", presented at the proceedings of the Compcon Spring 1992, Digest of Papers, Feb. 24, 1992.
Hewlett-Packard Co.
Lane Jack A.
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