Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor
Reexamination Certificate
2006-03-07
2006-03-07
Weiss, Howard (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Junction field effect transistor
C257S288000
Reexamination Certificate
active
07009228
ABSTRACT:
A method for fabricating a guard ring structure for JFETs and MESFETs. Trenches are etched in a semiconductor substrate for fabrication of a gate structure for a JFET or MESFET. At time the gate trenches are etched, concentric guard ring trenches are also etched. The process used to fabricate the gate p-h junction or Schottky barrier at the bottom of the gate trenches is also used to fabricate the guard ring at bottom of the guard ring trenches. The separation between the guard ring trenches is 1.0 to 3.0 times greater than the separation between the gate trenches.
REFERENCES:
patent: 4523111 (1985-06-01), Baliga
patent: 4645957 (1987-02-01), Baliga
patent: 5321283 (1994-06-01), Cogan et al.
patent: 5686330 (1997-11-01), Farb et al.
patent: 6251716 (2001-06-01), Yu
patent: 6396090 (2002-05-01), Hsu et al.
patent: 6455378 (2002-09-01), Inagawa et al.
patent: 6767783 (2004-07-01), Casady et al.
patent: 6780714 (2004-08-01), Gajda et al.
H. Ogiwara, M. Hayakawa, T. Nishimura and M. Nakaoka; “High-Frequency Induction Heating Inverter with Multi-Resonant Mode Using Newly Developed Normally-Off Type Static Induction Transistors”; Department of Electrical Engineering, Ashikaga Institute of Technology, Japan; Department of Electrical Engineering, Oita University, Japan; Department of Electrical Engineering, Kobe University, Japan; pp. 1017-1023.
J. Baliga; “Highvoltage Junction-Gate Field Effect Transistor with Recessed Gates”; IEEE Transactions on Electron Devices; vol. ED-29; No. 10; Oct. 1982.
J. M. C. Stork et al.; “Small Geometry Depleted Base Bipolar Transistors (BSIT)- VLSI Devices?”; IEEE Transactions on Electron Devices; vol. ED-28; No. 11; Nov. 1981.
Nishizawa et al.; “Analysis of Static Characteristics of a Bipolar Mode SIT (BSIT)”; IEEE Transactions on Electron Devices; vol. ED-29; No. 11; Aug. 1982.
Caruso et al.; “Performance Analysis of a Bipolar Mode FET (BMFET) with Normally Off Characteristics”; IEEE Transactions on Power Electronics; vol. 3; No. 2; Apr. 1988.
Nishizawa et al.; “Fieldeffect Transistor Versus Analog Transistor (Static Induction Transistor)”; IEEE Transactions on Electron Devices; vol. ED-24; No. 4; Apr. 1975.
Lovoltech, Incorporated
Trinh (Vikki) Hoa B.
Wagner , Murabito & Hao LLP
Weiss Howard
LandOfFree
Guard ring structure and method for fabricating same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Guard ring structure and method for fabricating same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Guard ring structure and method for fabricating same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3613774