Latch-up-free ESD protection circuit using SCR

Details Latch-up-free ESD protection circuit using SCR Latch-up-free ESD protection circuit using SCR

2006-09-05

2006-09-05

Sircus, Brian (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C327S310000

Reexamination Certificate

active

07102864

ABSTRACT:
A latch-up-free ESD protection circuit using SCR is disclosed, in which an SCR is connected between the input pad and the negative power supply; a turn-on switch and a turn-off switch are connected between the positive power supply VDD(or the input pad) and the SCR; and a transistor gating circuit is connected to the turn-on switch and the turn-off switch to direct the operation of the SCR. When overvoltage stress develops over the input pad in the fast-transient mode, the turn-on switch enables the NPN transistor to switch on the SCR to form a discharging path for electrostatic discharge; and when overvoltage stress is released, the turn-off switch enables the PNP transistor to switch off the SCR, thus making it immune to any latch-up after the overvoltage stress is released, and having the advantages of fast triggering, low trigger voltage, no latch-up, and full ESD protection in the active and passive modes.

REFERENCES:
patent: 5289334 (1994-02-01), Ker et al.
patent: 5504451 (1996-04-01), Smayling et al.
patent: 2003/0007301 (2003-01-01), Ker et al.
patent: 2003/0214773 (2003-11-01), Kitagawa
patent: 2004/0195629 (2004-10-01), Lai et al.

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