Semiconductor device and method of manufacturing the device

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S335000, C257S374000, C257SE21418, C257SE21419, C257SE29256

Reexamination Certificate

active

07034377

ABSTRACT:
To reduce the on-resistance in a semiconductor device, such as a trench lateral power MOSFET, a trench etching region forms a mesh pattern in which a first trench section, formed in an active region, and a second trench section, formed in a gate region for leading out gate polysilicon to a substrate surface, intersect each other. An island-like non-trench region, which is left without being subjected to etching, is divided into a plurality of smaller regions by one or more third trench section that connect with the first and second trench sections that form the mesh pattern. In each non-trench region, a contact section for connecting a drain region (or a source region) and an electrode is formed so as to be spread over all of the smaller regions in the non-trench region.

REFERENCES:
patent: 5539238 (1996-07-01), Malhi
patent: 5701026 (1997-12-01), Fujishima et al.
patent: 6693338 (2004-02-01), Saitoh et al.
patent: 2002/0179967 (2002-12-01), Fujishima
“A 30V Class Extremely Low On-resistance Meshed Trench Lateral Power MOSFET”; A Sugi et al.; IEEE Sep. 2002; pp. 297-300.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor device and method of manufacturing the device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device and method of manufacturing the device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method of manufacturing the device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3601838

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.