Programmable stackable memory array system

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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C365S227000, C365S229000

Reexamination Certificate

active

07023761

ABSTRACT:
Systems and methods are provided for reducing power consumption in the form of leakage current in a memory array. One embodiment discloses a memory array system. The memory array system comprises a plurality of memory cells and a programmable switching control circuit. The programmable switching control circuit is operative to arrange the plurality of memory cells in a standard configuration in an activation mode and to arrange the plurality of memory cells in a stacked configuration in a retention mode.

REFERENCES:
patent: 6111779 (2000-08-01), You
patent: 6556497 (2003-04-01), Cowles et al.

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