Dual referenced microstrip

Active solid-state devices (e.g. – transistors – solid-state diode – Superconductive contact or lead – Transmission line or shielded

Reexamination Certificate

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Details

C257S664000, C257SE23006, C361S795000, C333S204000

Reexamination Certificate

active

07109569

ABSTRACT:
Structures and methods are provided for dual referenced microstrip structures having low reference discontinuities between a microstrip trace referenced to a primary reference plane as compared to a microstrip trace referenced to a secondary reference plane. A method, according to one embodiment of the invention, includes the calculation of a first characteristic impedance of the dual referenced microstrip transmission line referenced to a primary reference layer, the calculation of a second characteristic impedance of the dual referenced microstrip transmission line referenced to a secondary reference layer, the calculation of an absolute value of a difference between the first and the second characteristic impedance, the comparison of the absolute value of the difference to a predetermined threshold value, and if the absolute value of the difference is greater than the predetermined threshold value, then a physical parameter associated with the characteristic impedance between the primary and secondary reference layers may be varied until the difference is reduced to less than the predetermined threshold. A structure, according to one embodiment of the invention includes a microstrip transmission line, a first conductive plane, a first dielectric layer provided between the microstrip transmission line and the first conductive plane, a second conductive plane, and a second dielectric layer provided between the first conductive plane and the second conductive plane.

REFERENCES:
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patent: 5768109 (1998-06-01), Gulick et al.
patent: 5966293 (1999-10-01), Obermaier et al.
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patent: 6538603 (2003-03-01), Chen et al.
patent: 6753481 (2004-06-01), Novak
patent: 2001/0013650 (2001-08-01), Goetz et al.
patent: 2001/0047588 (2001-12-01), Schaper
patent: 2002/0117739 (2002-08-01), Yoshida

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