PLL circuit and image display device

Details PLL circuit and image display device PLL circuit and image display device

2006-05-23

2006-05-23

Nguyen, Minh (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C375S376000

Reexamination Certificate

active

07049867

ABSTRACT:
A PLL circuit that makes a voltage-controlled oscillator converge to a stable state within a short time and generates a clock signal with high stability even when discontinuity occurs in the period of a reference input signal is provided. The PLL circuit has a voltage-controlled oscillator for outputting a clock controlled, a first counter reset by the reference input signal having one period longer than a reference period within a predetermined period for outputting a first signal, a second counter for outputting a second signal, a reset pulse generating circuit for resetting the second counter, a loop filter for holding and outputting the control voltage varied by a phase error signal and a discontinuous input detecting part for detecting the reference input signal input initially after its period becomes longer than the reference period.

REFERENCES:
patent: 4456884 (1984-06-01), Yarborough, Jr.
patent: 5281926 (1994-01-01), Rabii
patent: 6166606 (2000-12-01), Tsyrganovich
patent: 6222590 (2001-04-01), Makino
patent: 63-215265 (1988-09-01), None

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