Printed circuit board trace routing method

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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Details

C174S256000, C174S261000, C174S255000, C716S030000

Reexamination Certificate

active

07022919

ABSTRACT:
An I/O routing pattern method is disclosed, for use with heterogeneous printed circuit boards (PCBs), such as those embedded with a reinforcement material, for example, a fiberglass weave. Traces are routed on the PCB so as to reduce sensitivity to changes in the dielectric constant (Dk), which are brought about by the strands of reinforcement material contained within the PCB laminate. The method minimizes the local variations, such as the Dk, time of flight, and capacitance variations, that are observed with traditional routing methods on heterogeneous PCBs.

REFERENCES:
patent: 4103102 (1978-07-01), Klein
patent: 4115185 (1978-09-01), Carlson et al.
patent: 5837624 (1998-11-01), Sakaguchi et al.
patent: 6556583 (2003-04-01), Hayashi et al.

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