Method and apparatus for performing testing of interconnections

Data processing: measuring – calibrating – or testing – Testing system – Of circuit

Reexamination Certificate

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C702S059000, C714S720000

Reexamination Certificate

active

07031868

ABSTRACT:
The present invention provides a method and apparatus configured to allow testing of interconnections between components in a system. The present invention utilizes a source of a known pattern, for example a pattern buffer, in a first component of the system and a capture buffer located in a second component of the system.

REFERENCES:
patent: 5621741 (1997-04-01), Kohiyama
patent: 6208571 (2001-03-01), Ikeda et al.
patent: 6505317 (2003-01-01), Smith et al.
patent: 6609221 (2003-08-01), Coyle et al.
patent: 6885209 (2005-04-01), Mak et al.
patent: 2004/0117709 (2004-06-01), Nejedlo et al.
patent: WO 00/39218 (1999-08-01), None

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