Nonvolatile memory card

Registers – Records – Conductive

Reexamination Certificate

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Reexamination Certificate

active

07070113

ABSTRACT:
A nonvolatile memory has an erase table in which a free-space information flag is associated with each physical address of a memory area and an address translation table in which a physical address of a memory area is associated with each logical address. The free-space information flag indicates whether a corresponding memory area is permitted to be erased. A control circuit determines a memory area to which rewrite data is to be written by referring to the free-space information flag, reflects the physical address and the logical address of the memory area to which the data is written into the address translation table, and updates the free-space information flag. The memory area to which rewrite data is to be written is determined by referring to the free-space information flag, and rewriting is not performed in the same memory area.

REFERENCES:
patent: 5138696 (1992-08-01), Nagata
patent: 5644539 (1997-07-01), Yamagami et al.
patent: 6151247 (2000-11-01), Estakhri et al.
patent: 6606628 (2003-08-01), Monsen et al.
patent: 2004/0019784 (2004-01-01), Monsen et al.
patent: 2004/0065744 (2004-04-01), Shiraishi et al.
patent: H06-124596 (1994-05-01), None
patent: 5-204561 (2003-08-01), None

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