Negative voltage word line decoder, having compact...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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C365S230020

Reexamination Certificate

active

07046577

ABSTRACT:
An address decoder selectively applies to word lines of a memory array individual signals of variable polarity, negative or positive, the value of which varies according to a word line address applied to the decoder. The decoder comprises a group decoder delivering signals for selecting a group of word lines of variable polarity, at least one subgroup decoder delivering signals for selecting a subgroup of word lines of variable polarity, and word line drivers each comprising means for multiplexing the group and subgroup selection signals, for selecting and selectively applying one of these signals to a word line. Advantages: reduction in the size of the terminating elements of the decoders in relation with the reduction of the technological pitch in Flash memories.

REFERENCES:
patent: 5825205 (1998-10-01), Ohtsuka
patent: 6426908 (2002-07-01), Hidaka
patent: 6741515 (2004-05-01), Lazar et al.
patent: 6747903 (2004-06-01), Pan et al.
patent: 2002/0067639 (2002-06-01), Byeon et al.
patent: 1 255 254 (2002-11-01), None
patent: WO 02/41322 (2002-05-01), None

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