Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2006-07-25
2006-07-25
Awad, Amr A. (Department: 2677)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S092000, C345S098000
Reexamination Certificate
active
07081875
ABSTRACT:
In the display device having the retaining circuit for holding the digital image data at the pixel element, the power voltage supplied to the retaining circuit110is set up to be at the minimum level for the retaining circuit to hold the data during the data writing period, but the voltage supplied to the retaining circuit is raised by the voltage booster95upon the completion of the data writing. The retaining circuit110takes in the digital image signal fed from the drain signal line61in response to the signal fed from the gate signal line51and holds the digital image signal. Then, the display is carried out according to the signal held by the retaining circuit110. By this, the erroneous writing of the data to the retaining circuit is prevented. The reduction of the electric power consumption and the high density integration of the pixel elements are also possible.
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Yokoyama Ryoichi
Yoneda Kiyoshi
Awad Amr A.
Morrison & Foerster / LLP
Sanyo Electric Co,. Ltd.
Shapiro Leonid
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