Circuit designing apparatus, circuit designing method, and...

Data processing: structural design – modeling – simulation – and em – Structural design

Reexamination Certificate

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C703S015000, C714S726000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

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07107190

ABSTRACT:
A circuit designing apparatus comprising: unit for specifying the changed points of the circuit description automatically in predetermined unit, and classifying the plural test vectors into those related with the changed points and others not; wherein the second and subsequent logic verification processes are executed by using only the test vectors relating to the changed points. As a result, the time required for circuit design can be substantially curtailed.

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patent: 5892678 (1999-04-01), Tokunoh et al.
patent: 5910898 (1999-06-01), Johannsen
patent: 5912819 (1999-06-01), Kucukcakar et al.
patent: 6449750 (2002-09-01), Tsuchiya
patent: 6-76016 (1994-03-01), None
patent: 10-254914 (1998-09-01), None
patent: 10-320426 (1998-12-01), None
U.S. Appl. No. 09/482,935, filed Sep. 10, 2002, Tsuchiya.
Notice of Grounds for Rejection issued by the Japanese Patent Office Mailed Mar. 28, 2006, for Japanese Patent Application No. H11-186819, and English-language translation thereof.

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