Data processing: structural design – modeling – simulation – and em – Structural design
Reexamination Certificate
2006-09-12
2006-09-12
Knight, Anthony (Department: 2121)
Data processing: structural design, modeling, simulation, and em
Structural design
C703S015000, C714S726000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07107190
ABSTRACT:
A circuit designing apparatus comprising: unit for specifying the changed points of the circuit description automatically in predetermined unit, and classifying the plural test vectors into those related with the changed points and others not; wherein the second and subsequent logic verification processes are executed by using only the test vectors relating to the changed points. As a result, the time required for circuit design can be substantially curtailed.
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U.S. Appl. No. 09/482,935, filed Sep. 10, 2002, Tsuchiya.
Notice of Grounds for Rejection issued by the Japanese Patent Office Mailed Mar. 28, 2006, for Japanese Patent Application No. H11-186819, and English-language translation thereof.
Tsuchiya Takehiko
Yano Eiichi
Chang Sunray
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Knight Anthony
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