Shallow trench antifuse and methods of making and using same

Details Shallow trench antifuse and methods of making and using same Shallow trench antifuse and methods of making and using same

2006-04-25

2006-04-25

Tran, Mai-Huong (Department: 2818)

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

Using structure alterable to conductive state

C257S513000, C257S520000, C257S530000, C438S268000, C438S309000, C438S421000, C438S459000

Reexamination Certificate

active

07033867

ABSTRACT:
The antifuse device comprises an insulating layer positioned in the trench, a conductive member positioned above the insulating layer, at least a portion of the conductive member being positioned within the trench, the conductive member adapted to have at least one programming voltage applied thereto, and at least one doped active region formed in the substrate adjacent the trench. The antifuse further comprises at least one conductive contact coupled to the conductive member, and at least one conductive contact coupled to the doped active region. In one illustrative embodiment, the method comprises forming a trench in a semiconducting substrate, forming at least one layer of insulating material in the trench, forming a conductive member in the trench above the at least one layer of insulating material, forming at least one doped active region in the substrate adjacent the trench, forming at least one conductive contact that is coupled to the conductive member and forming at least one conductive contact that is coupled to the at least one doped active region.

REFERENCES:
patent: 5208177 (1993-05-01), Lee
patent: 6388305 (2002-05-01), Bertin et al.
patent: 6458631 (2002-10-01), Brintzinger et al.
patent: 6624031 (2003-09-01), Abadeer et al.
patent: 6881994 (2005-04-01), Lee et al.

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