Methodology to accurately test clock to signal valid and...

Details Methodology to accurately test clock to signal valid and... Methodology to accurately test clock to signal valid and...

2006-07-18

2006-07-18

Hollington, Jermele (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S765010

Reexamination Certificate

active

07078924

ABSTRACT:
A method for populating and depopulating components of negligible impedance facilitates the testing of circuit boards. The test circuitry may be formed upon the circuit board under test. Testing may be performed with great accuracy for the time between the triggering edge of a clock pulse and a resulting valid signal change. Slew rates of bus signals may be more easily measured.

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patent: 5760596 (1998-06-01), Peiffer et al.
patent: 6587965 (2003-07-01), Shaeffer et al.
patent: 2002/0099980 (2002-07-01), Olarig

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