Electronic shutter using buried layers and active pixel...

Details Electronic shutter using buried layers and active pixel... Electronic shutter using buried layers and active pixel...

Filed on

2006-09-19

Date issued

2006-09-19

Examiner

Srivastava, Vivek (Department: 2622)

Patent Class

Television

SubClass

Camera, system and detail

SubSubClass

Solid-state image sensor

Other Related Categories

C348S308000

Type

Reexamination Certificate

Status

active

Patent number

07110028

Description

ABSTRACT:
An electronic shutter switching transistor for a CMOS electronic is formed in a semiconductor substrate of a first conductivity type. The transistor comprises a pair of spaced apart doped regions of a second conductivity type opposite the first conductivity type disposed in the semiconductor substrate forming source/drain regions. A gate is disposed above and insulated from the semiconductor substrate and is self aligned with the pair of spaced apart doped regions. A well of the second conductivity type laterally surrounds the pair of spaced apart doped regions and extends deeper into the substrate than the doped regions. A buried layer of the second conductivity type underlies and is in contact with the well.

REFERENCES:
patent: 5202907 (1993-04-01), Yonemoto
patent: 5965875 (1999-10-01), Merrill
patent: 6369853 (2002-04-01), Merrill et al.
patent: 2002/0058383 (2002-05-01), Mancini et al.
N. Slevanovic et al., “MP 6.2 A CMOS Image Sensor for High-Speed Imaging”,2000 IEEE International Solid State Circuits Conference, pp. 104-105, Feb. 2000.

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