Methods of increasing the reliability of a flash memory

Details Methods of increasing the reliability of a flash memory Methods of increasing the reliability of a flash memory

2006-04-04

2006-04-04

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185240

Reexamination Certificate

active

07023735

ABSTRACT:
A multi-level flash memory cell is read by comparing the cell's threshold voltage to a plurality of integral reference voltages and to a fractional reference voltage. Multi-level cells of a flash memory are programmed collectively with data and redundancy bits at each significance level, preferably with different numbers of data and redundancy bits at each significance level. The cells are read collectively, from lowest to highest significance level, by correcting the bits at each significance level according to the redundancy bits and adjusting the bits of the higher significance levels accordingly. The adjustment following the correction of the least significant bits is in accordance with comparisons of a cell's threshold voltages to fractional reference voltages.

REFERENCES:
patent: 5675537 (1997-10-01), Bill et al.
patent: 5724284 (1998-03-01), Bill et al.
patent: 5973957 (1999-10-01), Tedrow
patent: 6456528 (2002-09-01), Chen

Affiliated with

Also associated with

Rating

Methods of increasing the reliability of a flash memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods of increasing the reliability of a flash memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of increasing the reliability of a flash memory will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3527483