Method for making an integrated circuit comprising a...

Details Method for making an integrated circuit comprising a... Method for making an integrated circuit comprising a...

2006-09-19

2006-09-19

Dang, Phuc T. (Department: 2818)

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Including integrally formed optical element

C438S223000

Reexamination Certificate

active

07109052

ABSTRACT:
A method for making an integrated circuit may include forming at least one active optical device and a waveguide coupled thereto. The waveguide may include a superlattice including a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

REFERENCES:
patent: 4485128 (1984-11-01), Dalal et al.
patent: 4594603 (1986-06-01), Holonyak, Jr.
patent: 4882609 (1989-11-01), Schubert et al.
patent: 4908678 (1990-03-01), Yamazaki
patent: 4937204 (1990-06-01), Ishibashi et al.
patent: 4969031 (1990-11-01), Kobayashi et al.
patent: 5055887 (1991-10-01), Yamazaki
patent: 5081513 (1992-01-01), Jackson et al.
patent: 5107306 (1992-04-01), Blood et al.
patent: 5216262 (1993-06-01), Tsu
patent: 5357119 (1994-10-01), Wang et al.
patent: 5371812 (1994-12-01), Nakamura
patent: 5606177 (1997-02-01), Wallace et al.
patent: 5683934 (1997-11-01), Candelaria
patent: 5684817 (1997-11-01), Houdre et al.
patent: 5994164 (1999-11-01), Fonash et al.
patent: 6058127 (2000-05-01), Joannopoulos et al.
patent: 6069394 (2000-05-01), Hashimoto et al.
patent: 6255150 (2001-07-01), Wilk et al.
patent: 6274007 (2001-08-01), Smirnov et al.
patent: 6281518 (2001-08-01), Sato
patent: 6281532 (2001-08-01), Doyle et al.
patent: 6326311 (2001-12-01), Ueda et al.
patent: 6344271 (2002-02-01), Yadav et al.
patent: 6350993 (2002-02-01), Chu et al.
patent: 6376337 (2002-04-01), Wang et al.
patent: 6436784 (2002-08-01), Allam
patent: 6472685 (2002-10-01), Takagi
patent: 6498359 (2002-12-01), Schmidt et al.
patent: 6501092 (2002-12-01), Nikonov et al.
patent: 6521549 (2003-02-01), Kamath et al.
patent: 6566679 (2003-05-01), Nikonov et al.
patent: 6621097 (2003-09-01), Nikonov et al.
patent: 2003/0034529 (2003-02-01), Fitzgerald et al.
patent: 2003/0057416 (2003-03-01), Currie et al.
patent: 2003/0162335 (2003-08-01), Yuki et al.
patent: 2003/0215990 (2003-11-01), Fitzgerald et al.
patent: 0696747 (1996-02-01), None
patent: 0703476 (1996-03-01), None
patent: 0793121 (1997-09-01), None
patent: 0 843 361 (1998-05-01), None
patent: 2347520 (2000-09-01), None
patent: 61145820 (1986-07-01), None
patent: 61220339 (1986-09-01), None
patent: 99/63580 (1999-12-01), None
patent: 02/103767 (2002-12-01), None
Luo et al.,Chemical Design of Direct-Gap Light-Emitting Silicon, published Jul. 25, 2002, The American Physical Society; vol. 89, No. 7.
Tsu,Phenomena in Silicon Nanostructure Devices, University of North Carolina at Charlotte, Sep. 6, 2000.
Ye et al.,GaAs MOSFET with Oxide Gate Dielectric Grown by Atomic Layer Deposition, Agere Systems, Mar. 2003.
Novikov et al.,Silicon-based Optoelectronics, 1999-2003, pp. 1-6.
Patent Abstracts of Japan, vol. 012, No. 080 (E-590), Mar. 12, 1988 & JP 62 219665 A (Fujitsu Ltd), Sep. 26, 1987 abstract.
Patent Abstracts of Japan, vol. 010, No. 179 (E-414), Jun. 24, 1986 & JP 61 027681 A (Res Dev Corp of Japan), Feb. 7, 1986 abstract.
A.T. Fiory et al., “Light Emission from Silicon: Some Perspectives and Applications”, Journal of Electronic Materials, vol. 32, No. 10, 2003, pp. 1043-1051.
“Structure of MBE grown semiconductor - atomic superlattices”, Tsu et al., Journal of Crystal Growth, Elsevier, Amsterdam, NL, vol. 227-228, Jul. 2001, pp. 21-26, XP004250792, ISSN: 0022-0248.
A Exploration for Si-based Superlattices Structure with Direct Band-gap, Huang et al., Mar. 29, 2001, XP002357978, available at http://phys.cts.nthu.edu.tw/workshop/ESC/mchuang.pdf.
“Transport through a nine period silicon/oxygen superlattice”, Applied Physics Letters, AIP, American Institute of Physics, Melville, NY, US, vol. 79, No. 6, Aug. 6, 2001, pp. 788-790, XP012029987, ISSN: 0003-6951.
“Silicon-Based Optoelectronics”, Proceedings of the IEEE, IEEE. New York, US, vol. 81, No. 12, Dec. 1, 1993, pp. 1687-1706, XP000426344, ISSN: 0018-9219.

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