Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2005-06-21
2005-06-21
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S230030, C365S233100, C365S190000, C365S193000
Reexamination Certificate
active
06909664
ABSTRACT:
A semiconductor memory device includes a bit line to be coupled to a memory cell, a data-bus line, a gate situated between the bit line and the data-bus line to control a coupling between the bit line and the data-bus line, and a signal generating circuit configured to generate at least one signal for controlling opening/closing of the gate in response to data that is to be stored in the memory cell.
REFERENCES:
patent: 5757696 (1998-05-01), Matsuo et al.
patent: 6674685 (2004-01-01), Fujino
patent: 2004/0208045 (2004-10-01), Shiratake
patent: 2000-30447 (2000-01-01), None
Arent Fox PLLC.
Tran Andrew Q.
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