Excavating
Patent
1990-04-10
1992-02-04
Smith, Jerry
Excavating
371 7, 371 81, G06F 1100
Patent
active
050864297
ABSTRACT:
A highly reliable data processing system using the pair-spare architecture obviates the need for separate memory arrays for each processor. A single memory is shared between each pair of processors wherein a linear block code error detection scheme is implemented with each shared memory, wherein the effect of random memory faults is sufficiently detected such that the inherent fault tolerance of a pair-spare architecture is not compromised.
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"Fault-Tolerant Computing--Concepts and Examples", Rennels, David A., IEEE Transactions on Computers. vol. C-33, No. 12, Dec. 1984, pp. 1116-1129. Copyrights 1984 by the Institute of Electrical and Electronics Engineers, Inc.
Error Control Coding: Fundamentals and Applications, Lin, Shu, Prentice-Hall, Englewood Cliffs, New Jersey 1983.
Gray Scott L.
Thompson Steven R.
Honeywell Inc.
Hua Ly V.
Smith Jerry
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