Metal fusion bonding – Process – Preplacing solid filler
Reexamination Certificate
2005-02-08
2005-02-08
Stoner, Kiley S. (Department: 1725)
Metal fusion bonding
Process
Preplacing solid filler
C228S175000
Reexamination Certificate
active
06851599
ABSTRACT:
A method of producing a multilayer wired circuit board that can provide sufficient adhesion strength of the interface between a conductor layer and a thermosetting adhesive layer laminated, to provide improvement in connection strength between the conductor layers and thus improvement in reliability. In this method, after a thermosetting adhesive layer is formed on a first conductor layer, an opening is formed in the thermosetting adhesive layer and solder powders are charged in the opening at normal temperature. Sequentially, a second conductor layer is formed on the thermosetting adhesive layer including the opening filled with the solder powders. Thereafter, the solder powders are melted by heating, to electrically connect between the first conductor layer and the second conductor layer.
REFERENCES:
patent: 4642160 (1987-02-01), Burgess
patent: 5451721 (1995-09-01), Tsukada et al.
patent: 5719749 (1998-02-01), Stopperan
patent: 5949142 (1999-09-01), Otsuka
patent: 6207259 (2001-03-01), Iino et al.
patent: 6362436 (2002-03-01), Kimbara et al.
patent: 20020039644 (2002-04-01), Kimbara et al.
patent: 20020136874 (2002-09-01), Iwamoto et al.
patent: 20040011855 (2004-01-01), Nakamura et al.
patent: 20040035520 (2004-02-01), Nakamura et al.
patent: 905763 (1999-03-01), None
patent: 1069811 (2001-01-01), None
patent: 8-228075 (1996-09-01), None
patent: 2001-28482 (2001-01-01), None
patent: 2001-237512 (2001-08-01), None
patent: 2002261427 (2002-09-01), None
patent: 2003086944 (2003-03-01), None
patent: 2003347735 (2003-12-01), None
patent: WO 03005789 (2003-01-01), None
Nakamura Kei
Oota Shinya
Tanigawa Satoshi
Dickinson Wright PLLC
Edwards, Esq. Jean C.
Nitto Denko Corporation
Stoner Kiley S.
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