Nonvolatile semiconductor memory device having tunnel insulating

Details Nonvolatile semiconductor memory device having tunnel insulating Nonvolatile semiconductor memory device having tunnel insulating

1990-12-06

1992-08-11

Larkins, William D.

357 54, 357 41, H01L 2968, H01L 2934, H01L 2702

Patent

active

051384108

ABSTRACT:
For improving endurance and retention characteristics of a nonvolatile semiconductor memory device that comprises a semiconductor substrate having source and drain regions therein, a floating gate provided above the semiconductor substrate through a first gate insulating film, a control gate provided above the flosting gate through a second gate insulating film, and a tunnel region provided in the first gate insulating film, an aperture is provided in the first gate insulating film so as to reach the semiconductor substrate, thereby defining the tunnel region therewith, and a tunnel insulating layer including at least one silicon nitride film is provided within the aperture.

REFERENCES:
Naruke et al., "Stress Induced Leakage Current Limiting to Scale Down Eeprom Tunnel Oxide Thickness", Tech Dig. IEEE, 424 IEDM 1988.
Arnett, P. C. and B. H. Yun, "Silicon Nitride Trap Properties as Revealed by Charge-Centroid Measurements on MNOS Devices", Appl. Phys. Lett., vol. 26, No. 3, pp. 94-96, Feb. 1, 1975.
Suzuki, "A Study on Researches of the Electro-Technical Laboratory" No. 844, May 1984, pp. 110-111.
Chen et al., "Oxide Breakdown Dependence on Thickness and Hole Current-Enhanced Reliability of Ultra Thin Oxides" IEDM 1986, pp. 660-663.
Hughes, R. C. and C. H. Seager, "Hole Trapping, Recombination and Space Charge in Irradiated Sandia Oxides", IEEE TRANS. on Nucleas Science vol. NS-30, No. 6, Dec. 1983.
Maes H. E. and R. J. Van Overstraeten, "Memeory Loss in MNOS Capacitors", J. Appl. Phys. vol. 47, p. 667, 1967.

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