Semiconductor device having multi-layer interconnection...

Details Semiconductor device having multi-layer interconnection... Semiconductor device having multi-layer interconnection...

2005-11-01

2005-11-01

Thomas, Tom (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S651000, C257S752000, C257S760000

Reexamination Certificate

active

06960834

ABSTRACT:
A semiconductor device includes a foundation having a first conductive region, and an inter-connection layer provided separate from the foundation. A first region occupying a range from the foundation to the interconnection layer is filled with gas or provided with a first interlayer dielectric film. A first connection plug provided in the first region electrically connects the first conductive region and the interconnection layer. A dielectric first support plug is provided in the first region so that so that the gas can be filled or the first interlayer dielectric film can be provided between the first connection plug and the first support plug. Further, the first plug extends from the interconnection layer to the foundation, and has a second Young's modulus.

REFERENCES:
patent: 5994777 (1999-11-01), Farrar
patent: 5998293 (1999-12-01), Dawson et al.
patent: 6017814 (2000-01-01), Grill et al.
patent: 6211561 (2001-04-01), Zhao
patent: 6291891 (2001-09-01), Higashi et al.
patent: 6566244 (2003-05-01), May et al.
Kelly H. Block, et al., “Integration of CMP with Low-k Materials”. Semiconductor International, Jun. 2002, pp. 115-122.

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