Silicon germanium CMOS channel

Details Silicon germanium CMOS channel Silicon germanium CMOS channel

2005-12-20

2005-12-20

Kebede, Brook (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

C257S616000

Reexamination Certificate

active

06977400

ABSTRACT:
A method for fabricating a semiconducting device on a substrate, where the improvement includes forming a strained silicon germanium channel layer on the substrate. A gate insulation layer is formed on top of the strained silicon germanium channel layer, at a temperature that does not exceed about eight hundred centigrade. A gate electrode is formed on top of the gate insulation layer, and the gate electrode is patterned. A low dose drain dopant is impregnated into the substrate, and activated with a first laser anneal. A source-drain dopant is impregnated into the substrate, and activated with a second laser anneal. After the step of activating the low dose drain dopant with the first laser anneal, an insulating layer is formed around the gate electrode, at a temperature that does not exceed about eight hundred centigrade, and a spacer is formed around the gate electrode. The spacer is formed of a material that is reflective to the second laser anneal. Thus, standard materials for the spacer, such as silicon oxide or silicon nitride are not preferred for this application, because they tend to be transparent to the laser beam emissions.

REFERENCES:
patent: 5155571 (1992-10-01), Wang et al.
patent: 5272365 (1993-12-01), Nakagawa
patent: 5891769 (1999-04-01), Liaw et al.
patent: 6310367 (2001-10-01), Yagishita et al.
patent: 6358806 (2002-03-01), Puchner

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