Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

2005-06-28

2005-06-28

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185240

Reexamination Certificate

active

06912160

ABSTRACT:
A nonvolatile semiconductor memory device includes a memory cell array which includes memory cells and reference cells, the reference cells including a first reference cell and a second reference cell. A data discriminating control unit generates an average reference level based on a reference level supplied from the first reference cell and a reference level supplied from the second reference cell, and the data discriminating control unit determining whether data is zero or one by comparison of a read-out level of each of the memory cells with the average reference level. A reference cell setting unit performs program verification for each memory cell with respect to a threshold level of the first reference cell to obtain a distribution of threshold levels of the memory cells, and the reference cell setting unit setting a threshold level of the second reference cell based on the distribution of the threshold levels of the memory cells.

REFERENCES:
patent: 6801457 (2004-10-01), Tanzawa et al.
patent: 2001156272 (2001-06-01), None

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