Electronic device and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

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Details

C257S734000, C438S613000, C438S612000

Reexamination Certificate

active

06965164

ABSTRACT:
An electronic device includes a semiconductor substrate in which an integrated circuit is formed; an insulating layer which is formed on the semiconductor substrate and includes an elastically deformable section; an electrode which is electrically connected with inside of the semiconductor substrate and is formed on the elastically deformable section; and a substrate on which an interconnect pattern is formed, the interconnect pattern facing the electrode and being electrically connected with the electrode. The elastically deformable section is elastically deformed in a manner to be depressed under the electrode, and presses the electrode against the interconnect pattern due to elasticity.

REFERENCES:
patent: 6255737 (2001-07-01), Hashimoto
patent: 6313532 (2001-11-01), Shimoishizaka et al.
patent: 6323542 (2001-11-01), Hashimoto
patent: 6475896 (2002-11-01), Hashimoto
patent: 09-033940 (1997-02-01), None
patent: 2798027 (1998-07-01), None
patent: 11-220069 (1999-08-01), None
patent: 11-340369 (1999-12-01), None
patent: 2000-150716 (2000-05-01), None
patent: 2002-170839 (2002-06-01), None
U.S. Appl. No. 10/828,101, filed Apr. 19, 2004, Hashimoto.

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