Semiconductor memory device

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S230030, C365S230060

Reexamination Certificate

active

06903956

ABSTRACT:
One semiconductor memory device according to the invention comprises a plurality of memory blocks, signal lines respectively connected to the plurality of memory blocks, and a control circuit connected to the signal lines, and the control circuit includes selection signal generator circuits for generating selection signals for selecting one memory block of the plurality of memory blocks by externally input address signals and for outputting the selection signals to the signal lines, and the lengths of the signal lines from the selection signal generator circuits to the respective memory blocks are longer in proportion to distances from the control circuit to the memory blocks. Thereby, parasitic load capacitances of the signal lines connected to the respective memory blocks in the wiring direction can be reduced, and the semiconductor memory device that operates with lower current consumption can be provided.

REFERENCES:
patent: 4636982 (1987-01-01), Takemae et al.
patent: 5369619 (1994-11-01), Ohba
patent: 6388937 (2002-05-01), Takeyama et al.

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