Process independent alignment marks

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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Details

C257S798000, C438S401000, C438S462000, C438S975000, C430S394000

Reexamination Certificate

active

06856029

ABSTRACT:
An integrated circuit substrate having a first surface for receiving a series of aligned layers during the creation of the integrated circuit, and a second surface disposed substantially opposite the first surface, where the second surface has at least one alignment mark for aligning the series of aligned layers one to another during creation of the integrated circuit. An apparatus for aligning a mask having an image and at least one complimentary alignment mark to a substrate having a first surface and a substantially opposing second surface, where the substrate has at least one alignment mark on the second surface.

REFERENCES:
patent: 4423127 (1983-12-01), Fujimura
patent: 5754405 (1998-05-01), Derouiche
patent: 5952247 (1999-09-01), Livengood et al.
patent: 5952694 (1999-09-01), Miyawaki et al.
patent: 6013954 (2000-01-01), Hamajima
patent: 6309943 (2001-10-01), Glenn et al.
patent: 6573986 (2003-06-01), Smith et al.
patent: 6645707 (2003-11-01), Amemiya et al.
patent: 61156837 (1986-07-01), None
patent: 05121767 (1993-05-01), None

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