Method for forming bit line of semiconductor device

Details Method for forming bit line of semiconductor device Method for forming bit line of semiconductor device

2005-02-22

2005-02-22

Elms, Richard (Department: 2824)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S250000, C438S253000

Reexamination Certificate

active

06858544

ABSTRACT:
A method for forming a bit line of a semiconductor device wherein a first opening in an interlayer insulation film is formed in a P+ S/D (source/drain) region, a post etch treatment (PET) for stabilizing the resistance in the P+ S/D opening is performed, followed by the subsequent formation of a second opening in the N+ S/D region, such that any increase of the resistance of the N+ S/D opening by the PET is thereby prevented.

REFERENCES:
patent: 5879986 (1999-03-01), Sung
patent: 6008085 (1999-12-01), Sung et al.
patent: 6351037 (2002-02-01), Liaw et al.
patent: 6355954 (2002-03-01), Gall et al.
patent: 6391705 (2002-05-01), Hsiao et al.
patent: 6413830 (2002-07-01), Wahlstrom

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