Methods of forming devices, constructions and systems...

Semiconductor device manufacturing: process – Making regenerative-type switching device

Reexamination Certificate

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C438S135000, C257S133000, C257S146000

Reexamination Certificate

active

06958263

ABSTRACT:
The invention includes SOI constructions containing one or more memory cells which include a transistor and a thyristor. In one aspect, a scalable GLTRAM cell provides DRAM-like density and SRAM-like performance. The memory cell includes an access transistor and a gated-lateral thyristor integrally formed above the access transistor. The cathode region (n+) of the stacked lateral thyristor device (p+
/p
+) is physically and electrically connected to one of the source/drain regions of the FET to act as the storage node for the memory cell. The FET transistor can include an active region which extends into a Si/Ge material. The material comprising Si/Ge can have a relaxed crystalline lattice, and a layer having a strained crystalline lattice can be between the material having the relaxed crystalline lattice and the transistor gate. The device construction can be formed over a versatile substrate base.

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