Electrical computers and digital processing systems: multicomput – Network-to-computer interfacing
Reexamination Certificate
2005-12-13
2005-12-13
Huynh, Kim (Department: 2182)
Electrical computers and digital processing systems: multicomput
Network-to-computer interfacing
C709S249000, C370S229000, C370S395210, C370S395300, C370S395420
Reexamination Certificate
active
06976096
ABSTRACT:
A method and apparatus for controlling the admission of data packets into a network element is described. In an embodiment, a method for controlling admittance of a data packet into a memory buffer includes performing, prior to queuing the data packet for routing by a processor, the following: (1) receiving a data packet from one of at least two different ports, (2) determining a priority value within the data packet, and (3) determining an admittance group identifier for the data packet based on the priority value and the port the data packet was received. The method also comprises queuing the data packet from the memory buffer to one of a number of queues for routing by the processor upon determining that a number of data packets stored in the memory buffer and having the admittance group identifier is not greater than a threshold value.
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Cherukuri Ravikrishna V.
Minshall Gregory G.
Blakely & Sokoloff, Taylor & Zafman
Huynh Kim
Martinez David
Redback Networks Inc.
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