Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

2005-08-30

2005-08-30

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185140, C365S185220

Reexamination Certificate

active

06937520

ABSTRACT:
In a nonvolatile floating-gate semiconductor memory device, a word line voltage supply circuit is configured to be able to apply gate voltages to the same memory cells such that the gate voltage applied at and after the second time is different from the gate voltage applied at the first time. At least one of the word line voltage supply circuit and the bit line voltage supply circuit is set to be able to apply a voltage to the same memory cells for a longer application period at the first time than at and after the second time. With this configuration, the threshold voltage distribution of the memory cells is controlled to be narrow.

REFERENCES:
patent: 6166979 (2000-12-01), Miyamoto
patent: 6414893 (2002-07-01), Miyamoto
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patent: 6580643 (2003-06-01), Satoh et al.
patent: 2005/0024938 (2005-02-01), Ono et al.
patent: 11-134879 (1999-05-01), None
Giovanni Campardo, et al., “40-mm2 3-V-Only 50-Mhz 64-Mb 2-v/Cell CHE NOR Flash Memory”, IEEE Journal Of Solid-State Circuits, vol. 35, No. 11, Nov. 2000.

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