Method for fabricating semiconductor integrated circuit

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S751000, C257S768000, C257S774000, C438S118000, C438S622000

Reexamination Certificate

active

06853081

ABSTRACT:
The semiconductor device is formed according to the following steps. A TiN film71and a W film72are deposited on a silicon oxide film64including the inside of a via-hole66by the CVD method and thereafter, the W film72and TiN film71on the silicon oxide film64are etched back to leave only the inside of the via-hole66and form a plug73. Then, a TiN film74, Al-alloy film75, and Ti film76are deposited on the silicon oxide film64including the surface of the plug73by the sputtering method and thereafter, the Ti film76, Al-alloy film75, and TiN film74are patterned to form second-layer wirings77and78.

REFERENCES:
patent: 5420072 (1995-05-01), Fiordalice et al.
patent: 5576240 (1996-11-01), Radosevich et al.
patent: 5607878 (1997-03-01), Otsuka et al.
patent: 5620926 (1997-04-01), Itoh
patent: 5654581 (1997-08-01), Radosevich et al.
patent: 5783471 (1998-07-01), Chu
patent: 5801097 (1998-09-01), Chang
patent: 5834369 (1998-11-01), Murakami et al.
patent: 5904557 (1999-05-01), Komiya et al.
patent: 5929524 (1999-07-01), Drynan et al.
patent: 6162744 (2000-12-01), Al-Shareef et al.
patent: 6165834 (2000-12-01), Agarwal et al.
patent: 6194304 (2001-02-01), Morozumi et al.
patent: 6255186 (2001-07-01), Al-Shareef et al.
patent: 6313518 (2001-11-01), Ahn et al.
patent: 6407452 (2002-06-01), Agarwal et al.
patent: 6555471 (2003-04-01), Sandhu et al.
patent: 6593657 (2003-07-01), Elliott et al.
patent: 6635918 (2003-10-01), Narui et al.
patent: 8-204144 (1996-08-01), None
patent: 9-45770 (1997-02-01), None
patent: 9-219501 (1997-08-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for fabricating semiconductor integrated circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating semiconductor integrated circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating semiconductor integrated circuit will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3469510

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.