Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2005-08-30
2005-08-30
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
C365S185170
Reexamination Certificate
active
06937513
ABSTRACT:
A semiconductor memory device is provided as well as a method for operating the semiconductor memory device. The memory device includes a NOR array of memory cells and a NAND array of memory cells configured on the same monolithic semiconductor substrate. Each cell of the NOR array involves a single transistor, similar to each cell of the NAND array. The memory device is, therefore, an integrated circuit that includes not only the NOR and NAND arrays, but also the row and column decoders corresponding to each array. Furthermore, the integrated circuit includes the interface circuitry needed to transfer information as pages into and from the NAND array. The corresponding interface or controller is implemented on the same monolithic substrate as both the NAND array and the NOR array. Addresses targeted for the NOR array are sent as fully memory-mapped data into the NOR array, whereas addresses targeted for the NAND array are sent through the controller integrated within the semiconductor memory device. The single transistor cell of both the NAND array and NOR array preferably involves a flash EEPROM-type transistor that implements a floating gate dielectrically spaced between a control gate and the semiconductor substrate.
REFERENCES:
patent: 6124729 (2000-09-01), Noble et al.
patent: 6197639 (2001-03-01), Lee et al.
patent: 6259118 (2001-07-01), Kadosh et al.
patent: 6370062 (2002-04-01), Choi
patent: 6549461 (2003-04-01), Park et al.
patent: 6570213 (2003-05-01), Wu
patent: 6654595 (2003-11-01), Dexter
“Flash Decision”—Author(s)—John Edwards.
NAND Flash Applications Design Guide—Author(s)—Toshiba America Electronic Components, Inc.
Desai Geeta
Kuroodi Vijendra
Lenoir Remi
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