Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2005-05-24
2005-05-24
Nguyen, Viet Q. (Department: 2818)
Static information storage and retrieval
Interconnection arrangements
C365S206000, C365S214000
Reexamination Certificate
active
06898102
ABSTRACT:
A novel bi-level DRAM architecture is described which achieves significant reductions in die size while maintaining the noise performance of traditional folded architectures. Die size reduction results primarily by building the memory arrays with 6F2or smaller memory cells in a type of cross-point memory cell layout. The memory arrays utilize stacked digitlines and vertical digitline twisting to achieve folded architecture operation and noise performance.
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Nguyen Viet Q.
TraskBritt
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