Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
Reexamination Certificate
2005-08-30
2005-08-30
Chan, Eddie (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Commitment control or register bypass
Reexamination Certificate
active
06938150
ABSTRACT:
By using an entry number (WRB number) of a re-order buffer6, each of function units such as an operation unit3, a store unit4, a load unit5, etc. notifies to the re-order buffer6the processing end for a instruction stored in the entry concerned in the unit thereof. The load unit5manages the latest speculation state of a load instruction issued on the basis of a branch prediction success/failure signal output from the branch unit2, and makes no notification to the re-order buffer6on the basis of WRB number for subsequent load instructions of a branch-prediction failed branch instruction even when the processing of the instruction is finished. Accordingly, the re-order buffer6can re-use entries in which the subsequent instructions of the branch prediction failed branch instruction are stored.
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Chan Eddie
Huisman David J.
NEC Corporation
Sughrue & Mion, PLLC
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