Method and apparatus for inspecting a semiconductor device

Image analysis – Applications – Manufacturing or product inspection

Reexamination Certificate

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Details

C382S145000, C382S147000, C348S125000, C348S126000, C356S237100, C250S559390, C700S110000

Reexamination Certificate

active

06952492

ABSTRACT:
A method and apparatus for inspecting a semiconductor device in which failure occurence conditions on a whole wafer are estimated by calculating the statistic of potential contrasts in pattern sections from sampled images to implement higher throughput, and defective conditions of a process are detected at an early stage with the help of time series data of the estimate result.

REFERENCES:
patent: 6172363 (2001-01-01), Shinada et al.
patent: 6366688 (2002-04-01), Jun et al.
patent: 6613593 (2003-09-01), Tanaka et al.
patent: 5-258703 (1993-10-01), None
patent: 2000-58608 (2000-02-01), None
patent: 2000-208085 (2000-07-01), None
Hess et al. Wafer Level Defect Density Distribution Using Checkerboard Test Structures, IEE 1998 Int. Conference on Microelectronic Test Structures, Mar. 1998, vol. 11, pp. 101-105.
Patent Abstracts of Japan 2000-208085 Jul. 28, 2000.
Patent Abstracts of Japan 05-258703 Oct. 8, 1993.
Patent Abstracts of Japan 2000-058608 Feb. 25, 2000.

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