Electric lamp and discharge devices – Discharge devices having an electrode of particular material
Reexamination Certificate
2005-08-23
2005-08-23
Glick, Edward J. (Department: 2882)
Electric lamp and discharge devices
Discharge devices having an electrode of particular material
C313S309000, C313S310000, C313S351000, C438S020000, C445S050000, C445S051000, C445S024000
Reexamination Certificate
active
06933665
ABSTRACT:
Improved methods and structures are provided for an array of vertical geometries which may be used as emitter tips, as a self aligned gate structure surrounding field emitter tips, or as part of a flat panel display. The present invention offers controlled size in emitter tip formation under a more streamlined process. The present invention further provides a more efficient method to control the gate to emitter tip proximity in field emission devices. The novel method of the present invention includes implanting a dopant in a patterned manner into the silicon substrate and anodizing the silicon substrate in a controlled manner causing a more heavily doped region in the silicon substrate to form a porous silicon region.
REFERENCES:
patent: 3665241 (1972-05-01), Spindt et al.
patent: 3755704 (1973-08-01), Spindt et al.
patent: 3812559 (1974-05-01), Spindt et al.
patent: 5186670 (1993-02-01), Doan et al.
patent: 5229331 (1993-07-01), Doan et al.
patent: 5229682 (1993-07-01), Komatsu
patent: 5259799 (1993-11-01), Doan et al.
patent: 5358908 (1994-10-01), Reinberg et al.
patent: 5372973 (1994-12-01), Doan et al.
patent: 5401676 (1995-03-01), Lee
patent: 5458518 (1995-10-01), Lee
patent: 5564958 (1996-10-01), Itoh et al.
patent: 5578902 (1996-11-01), Vickers
patent: 5597444 (1997-01-01), Gilton
patent: 5608283 (1997-03-01), Twichell et al.
patent: 5627427 (1997-05-01), Das et al.
patent: 5666020 (1997-09-01), Takemura
patent: 5672938 (1997-09-01), Jones
patent: 5769679 (1998-06-01), Park et al.
patent: 5844250 (1998-12-01), Itoh et al.
patent: 5853492 (1998-12-01), Cathey et al.
patent: 5857885 (1999-01-01), Laou et al.
patent: 5898258 (1999-04-01), Sakai et al.
patent: 5910791 (1999-06-01), Zimlich et al.
patent: 5956611 (1999-09-01), Cathey, Jr. et al.
patent: 5973444 (1999-10-01), Xu et al.
patent: 6008063 (1999-12-01), Derraa
patent: 6028322 (2000-02-01), Moradi
patent: 6080032 (2000-06-01), Alwan
patent: 6194826 (2001-02-01), Satou et al.
patent: 6232705 (2001-05-01), Forbes et al.
patent: 6297587 (2001-10-01), Kikuchi et al.
patent: 6323587 (2001-11-01), Zhang et al.
Anderson, R.C. ,et al. , “Porous Polycrystalline Silicon: A New Material for MEMS”,IEEE,(1994), pp. 10-18.
Boswell, E..C. ,et al. , “Polycrystalline Silicon Field Emitters”,8th International Vacuum Microelectronics Conference Technical Digest,(1996),pp. 181-185.
Boswell, E..C. ,et al. , “Polycrystalline Silicon Field Emitters”,J. Vac. Sci. Technol. B14 (3), (1996),pp. 1910-1913.
Huang, W..N. ,et al. , “Photoluminescence in porous sputtered polysilicon films formed by chemical etching”,Semicond. Sci. Technol., 12,(1997),pp. 228-233.
Huang, W..N. , et al. , “Properties of chemically etched porous polycrystalline silicon deposited by r.f. sputtering”,IEEE Hong Kong Electron Devices Meeting,(1996), pp. 21-24.
Huq, S..E. ,et al. , “Comparative study of gated single crystal silicon and polysilicon field emitters”,J. Vac. Sci. Technol. B15 (6), (1997),pp. 2855-2858.
Huq, S..E. ,et al. , “Fabrication of Gated Polycrystalline Silicon Field Emitters”,9th International Vacuum Microelectrics Conference,St. Petersburg,(1996),pp. 367-370.
Kim, I..H. , et al. , “Fabrication of metal field emitter arrays on polycrystalline silicon”,J. Vac. Sci. Technol. B15 (2), (1997),pp. 468-471.
Kim, H..,et al. , “Metal FEA's on Double Layer Structure of Polycrystalline Silicon”,9th International Vacuum Microelectronics Conference,St. Petersburg,(1996), pp. 423-426.
Lazarouk, S..,et al. , “Electrical characterization of visible emitting electroluminescent Schottky diodes based on n-type porous silicon and on highly doped n-type porous polysilicon”,Journal of Non-Crystalline Solids,(1996),pp. 973-976.
Lee, J..H. ,et al. ,“A New Fabrication Method of Silicon Field Emitter Array with Local Oxidation of Polysilicon and Chemical-Mechanical-Polishing”,9th International Vacuum Microelectronics Conference,St. Petersburg,(1996),pp. 415-418.
Pullen, S..E. ,et al. , “Enhanced Field Emission from Polysilicon Emitters Using Porous Silicon”,9th International Vacuum Microelectronics Conference,St. Petersburg,(1996),pp. 211-214.
Uh, H..S. , et al. , “Enhanced Electron Emission and Its Stability from Gated Mo-polycide Field Emitters”,IEEE,(1997),pp. 713-716.
Uh, H..S. , et al. , “Fabrication and Characterization of Gated n Polycrystalline Silicon Field Emitter Arrays”,9th International Vacuum Microelectronics Conference,St. Petersburg,(1996), pp. 419-422.
Uh, H..S. ,et al. ,“Process design and emission properties of gated n polycrystalline silicon field emitter arrays for flat-panel display applications”,J. Vac. Sci. Technol. B15 (2), (1997),pp. 472-476.
Gilton Terry L.
Morgan Paul A.
Glick Edward J.
Keaney Elizabeth
Micro)n Technology, Inc.
Schwegman Lundberg Woessner & Kluth P.A.
LandOfFree
Structure and method for field emitter tips does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Structure and method for field emitter tips, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Structure and method for field emitter tips will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3447741