Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2005-02-01
2005-02-01
Nguyen, Viet Q. (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185110, C365S185330, C365S218000
Reexamination Certificate
active
06850443
ABSTRACT:
A mass storage system made of flash electrically erasable and programmable read only memory (“EEPROM”) cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the service lifetime of the memory system. Since this type of memory cell becomes unusable after a finite number of erase and rewrite cycles, although in the tens of thousands of cycles, uneven use of the memory banks is avoided so that the entire memory does not become inoperative because one of its banks has reached its end of life while others of the banks are little used. Relative use of the memory banks is monitored and, in response to detection of uneven use, have their physical addresses periodically swapped for each other in order to even out their use over the lifetime of the memory.
REFERENCES:
patent: 4093985 (1978-06-01), Das
patent: 4430727 (1984-02-01), Moore et al.
patent: 4528683 (1985-07-01), Henry
patent: 4530054 (1985-07-01), Hamstra et al.
patent: 4562532 (1985-12-01), Nishizawa et al.
patent: 4563752 (1986-01-01), Pelgrom et al.
patent: 4608671 (1986-08-01), Shimizu et al.
patent: 4612640 (1986-09-01), Mehrotra et al.
patent: 4616311 (1986-10-01), Sato
patent: 4638457 (1987-01-01), Schrenk
patent: 4663770 (1987-05-01), Murray et al.
patent: 4682287 (1987-07-01), Mizuno et al.
patent: 4718041 (1988-01-01), Baglee et al.
patent: 4803707 (1989-02-01), Cordan, Jr.
patent: 4899272 (1990-02-01), Fung et al.
patent: 4922456 (1990-05-01), Naddor et al.
patent: 4924375 (1990-05-01), Fung et al.
patent: 4943962 (1990-07-01), Imamiya et al.
patent: 4947410 (1990-08-01), Lippmann et al.
patent: 4953073 (1990-08-01), Moussouris et al.
patent: 5034926 (1991-07-01), Taura et al.
patent: 5043940 (1991-08-01), Harari
patent: 5053990 (1991-10-01), Kreifels et al.
patent: 5065364 (1991-11-01), Atwood et al.
patent: 5065564 (1991-11-01), Atwood et al.
patent: 5095344 (1992-03-01), Harrari
patent: 5103411 (1992-04-01), Shida et al.
patent: 5134589 (1992-07-01), Hamano
patent: 5138580 (1992-08-01), Farrugia et al.
patent: 5155705 (1992-10-01), Goto et al.
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5168465 (1992-12-01), Harari
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5193071 (1993-03-01), Umina et al.
patent: 5210716 (1993-05-01), Takada
patent: 5222109 (1993-06-01), Pricer
patent: 5245572 (1993-09-01), Kosonocky et al.
patent: 5263003 (1993-11-01), Cowles et al.
patent: 5267218 (1993-11-01), Elbert
patent: 5268870 (1993-12-01), Harari
patent: 5270979 (1993-12-01), Harari et al.
patent: 5272669 (1993-12-01), Samachisa et al.
patent: 5280447 (1994-01-01), Hazen et al.
patent: 5295255 (1994-03-01), Malecek et al.
patent: 5297148 (1994-03-01), Harari et al.
patent: 5303198 (1994-04-01), Adachi et al.
patent: 5341489 (1994-08-01), Heiberger et al.
patent: 5357473 (1994-10-01), Mizuno et al.
patent: 5371876 (1994-12-01), Ewertz et al.
patent: 5388083 (1995-02-01), Assar et al.
patent: 5430859 (1995-07-01), Norman et al.
patent: 5544118 (1996-08-01), Harari
patent: 5548554 (1996-08-01), Pascucci et al.
patent: 5630093 (1997-05-01), Holzhammer et al.
patent: 5663901 (1997-09-01), Wallace et al.
patent: 5726937 (1998-03-01), Beard
patent: 5930167 (1999-07-01), Lee et al.
patent: 6081447 (2000-06-01), Lofgren et al.
patent: 6230233 (2001-05-01), Lofgren et al.
patent: 6594183 (2003-07-01), Lofgren et al.
patent: 2840305 (1980-07-01), None
patent: 3200872 (1983-07-01), None
patent: 0349775 (1990-01-01), None
patent: 0392895 (1990-10-01), None
patent: 0398654 (1990-11-01), None
patent: 0424191 (1991-04-01), None
patent: 0424191 (1991-04-01), None
patent: 00492106 (1992-07-01), None
patent: 0522780 (1993-01-01), None
patent: 0569040 (1993-11-01), None
patent: 0615193 (1994-09-01), None
patent: 2251323 (1992-07-01), None
patent: 02251323 (1992-07-01), None
patent: 02251324 (1992-07-01), None
patent: 58-215794 (1983-12-01), None
patent: 58215795 (1983-12-01), None
patent: 59-45695 (1984-03-01), None
patent: 59045695 (1984-03-01), None
patent: 59162695 (1984-09-01), None
patent: 59-162695 (1984-09-01), None
patent: 60179857 (1985-09-01), None
patent: 60-212900 (1985-10-01), None
patent: 58215795 (1985-12-01), None
patent: 61-165894 (1986-07-01), None
patent: 59 45695 (1987-04-01), None
patent: 62-229598 (1987-10-01), None
patent: 62-245600 (1987-10-01), None
patent: 62-283496 (1987-12-01), None
patent: 62-283497 (1987-12-01), None
patent: S63-6600 (1988-01-01), None
patent: 63183700 (1988-07-01), None
patent: 1235075 (1989-09-01), None
patent: 2189790 (1990-07-01), None
patent: 2292798 (1990-12-01), None
patent: 3030034 (1991-02-01), None
patent: 3025798 (1991-04-01), None
patent: 3283094 (1991-12-01), None
patent: 4123243 (1992-04-01), None
patent: 4243096 (1992-08-01), None
patent: 5027924 (1993-02-01), None
patent: 5028039 (1993-02-01), None
patent: 5204561 (1993-08-01), None
patent: 5241741 (1993-09-01), None
patent: 58-215795 (1993-12-01), None
patent: 02000346670 (2000-12-01), None
patent: WO9218928 (1992-10-01), None
patent: WO9311491 (1993-06-01), None
patent: WO 9427382 (1994-11-01), None
Torelli et al. “An Improved Method for Programming a Word-Erasable EEPROM,” Alta Fequenza, vol. 52, Nov. 1983, pp. 487-494.
Lahti et al. “Store Data in a Flash”, BYTE, Nov. 1990, pp. 311-313, 315 & 317-318.
Leibson, Steven H. “Nonvolatile, In-Circuit-Reprogrammable Memories”, EDN Special Report, Jan. 3, 1991, pp. 89-97, 100 & 102.
Nozaki et al., A 1-Mb EEPROM with MONOS Memory Cell for Semiconductor Disk Application, IEEE Journal of Solid State Circuits, vol. 26, No. 4, Apr. 1991, pp. 497-501.
Auclair, Daniel, “Optimal Solid State Disk Architecture for Portorable Computers”, SunDisk, presented at the Silicon Valley PC Design Conference, Jul. 9, 1991, pp. 1-4.
Hwang et al., “Computer Architecture and Parallel Processing”, McGraw-Hill, 1984, p. 64.
Williams, John G., “Asymmetric Memory Hierarchies”, Communications of the Association for Computing Machinery, vol. 16, No. 4, Apr. 1973, pp. 213-222.
Computer Technology Review, “Flash Memory for Top Speeds in Mobile Computing”, vol. 12, No. 7, Jun. 1992, pp. 36-37.
Torelli et al., “An Improved Method for Programming a Word-Erasable EEPROM,”Alta Frequenza, vol. 52, Nov. 1983, pps. 487-494.
Lahti & McCarron, “Store Data in a Flash,”BYTE, Nov. 1990, pp. 311-313, 315-318.
Leibson, “Nonvolatile, In-Circuit-Reprogrammable Memories,” EDN Special Report, Jan. 3, 1991, pp 89-97, 100 and 102.
Nozaki et al., “A 1-Mb EEPROM with MONOS Memory Cell for Semiconductor Disk Application,”IEEE Journal of Solid State Circuits, vol. 26, No. 4, Apr. 1991, pp. 497-501.
Auclair, “Optimal Solid State Disk Architecture for Portable Computers,” SunDisk, presented at the Silicon Valley PC Design Conference, Jul. 9, 1991, pp. 1-4.
Hwang, K, Briggs, F.A.,Computer Architecture and Parallel Processing, McGraw-Hill, 1984, p. 64.
Boxer, Aaron, “Where Buses Cannot Go,” IEEE Spectrum, Feb., 1995, pp. 41-45.
Gupta Anil
Lofgren Karl M. J.
Norman Robert D.
Thelin Gregory B.
Nguyen Viet Q.
Parsons Hsue & de Runtz LLP
SanDisk Corporation
Western Digital Corporation
LandOfFree
Wear leveling techniques for flash EEPROM systems does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Wear leveling techniques for flash EEPROM systems, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Wear leveling techniques for flash EEPROM systems will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3446479