Array substrate having diodes connected to signal lines,...

Liquid crystal cells – elements and systems – Nominal manufacturing methods or post manufacturing... – Defect correction or compensation

Reexamination Certificate

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Details

C349S054000, C349S149000, C345S098000, C324S701000

Reexamination Certificate

active

06924875

ABSTRACT:
An array substrate is provided for which an OS inspection can be performed without increasing the area of a signal driving circuit formed on the array substrate, and for which the manufacturing cost can be reduced. The array substrate includes a substrate, scanning lines, signal lines, pixel electrodes connected via switching elements provided at the intersections of the scanning lines and the signal lines, a plurality of input/output terminals provided at an edge portion of the substrate, a scanning line driving circuit, a signal line driving circuit for supplying picture signals sent from the outside to one ends of the signal lines via the input/output terminals, and a wiring line commonly connecting the other ends of the signal lines to at least one of the input/output terminals. A predetermined level of voltage is applied between the input/output terminal to which the wiring line is connected and another input/output terminal which at least supplies picture signals, and a current flowing at that time is measured to detect failures.

REFERENCES:
patent: 5831709 (1998-11-01), Song
patent: 6049321 (2000-04-01), Sasaki
patent: 6340963 (2002-01-01), Anno et al.
patent: 2001/0030722 (2001-10-01), Murade

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