Manufacturing method for vertically conductive semiconductor dev

Details Manufacturing method for vertically conductive semiconductor dev Manufacturing method for vertically conductive semiconductor dev

1989-05-16

1990-04-24

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 29, 437 40, 437 95, 437228, 148DIG126, H01L 21223, H01L 21265

Patent

active

049200623

ABSTRACT:
A first semiconductor layer is formed on a semiconductor anode layer containing a high concentration of impurity of a first conductivity type. This first semiconductor layer contains an impurity in a lower concentration than the impurity concentration of the anode layer on which it is formed. A second semiconductor layer containing a high concentration of impurity of a second conductive type is formed on the first semiconductor layer, and a third semiconductor layer containing a low concentration of impurity of the second conductive type is formed on the second semiconductor layer. Impurity regions of at least the first conductivity type are formed by thermal diffusion in the surface region of this third semiconductor layer. During the thermal diffusion, the impurity contained in the anode layer diffuses into the first semiconductor layer. However, the concentration and thickness of the first semiconductor layer are specified so that, even after thermal diffusion, the concentration of the second semiconductor layer is not essentially changed, and thus a semiconductor device which has a thin, high concentration buffer layer can be provided by this production method.

REFERENCES:
patent: 4364073 (1982-12-01), Becke et al.
patent: 4696701 (1987-09-01), Sullivan
Kuo et al., "Optimization of Epitaxial Layers for Power Bipolar-MOS Transistor," IEEE Electron Device Letters, vol. EDL-7, No. 9, pp. 510-512, Sep. 1986.

Affiliated with

Also associated with

Rating

Manufacturing method for vertically conductive semiconductor dev does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Manufacturing method for vertically conductive semiconductor dev, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Manufacturing method for vertically conductive semiconductor dev will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-34421