Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2005-01-18
2005-01-18
Nguyen, Viet Q. (Department: 2818)
Static information storage and retrieval
Floating gate
Multiple values
C365S185240, C365S185280, C365S185180, C365S185010
Reexamination Certificate
active
06845039
ABSTRACT:
A method is provided for programming a memory cell of an electrically erasable programmable read only memory. The memory cell is fabricated on a substrate and comprises a source region, a drain region, a floating gate, and a control gate. The memory cell has a threshold voltage selectively configurable into one of at least three programming states. The method includes generating a drain current between the drain region and the source region by applying a drain-to-source bias voltage between the drain region and the source region. The method further includes injecting hot electrons from the drain current to the floating gate by applying a gate voltage to the control gate. A selected threshold voltage for the memory cell corresponding to a selected one of the programming states is generated by applying a selected constant drain-to-source bias voltage and a selected gate voltage.
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Chen Chun
Prall Kirk D.
Knobbe Martens Olson & Bear LLP
Micro)n Technology, Inc.
Nguyen Viet Q.
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