Method and apparatus for off boundary memory access

Details Method and apparatus for off boundary memory access Method and apparatus for off boundary memory access

2005-09-13

2005-09-13

Nguyen, Viet Q. (Department: 2827)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S230020, C365S230030, C365S230040, C365S230010

Reexamination Certificate

active

06944087

ABSTRACT:
Disclosed is a method and apparatus for an off boundary memory to provide off boundary memory access. The off boundary memory includes a right memory array having a plurality of right memory rows and a left memory array having a plurality of left memory rows. This forms a memory having a plurality of row lines, each row line having a right memory row and a left memory row, respectively. An off boundary row address decoder is coupled to both the right and left memory arrays and is capable of performing an off boundary memory access which includes accessing a desired plurality of memory addresses from one of a right or left memory row of a row line and from one of a left or right memory row of an adjacent row line at substantially the same time within one memory access cycle.

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