Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2005-01-11
2005-01-11
Wilson, Allan R. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S024000
Reexamination Certificate
active
06841795
ABSTRACT:
A semiconductor device includes a series of layers formed on a substrate, the layers including a first plurality of layers including an n-type ohmic contact layer, a p-type modulation doped quantum well structure, an n-type modulation doped quantum well structure, and a fourth plurality of layers including a p-type ohmic contact layer. Etch stop layers are used to form contacts to the n-type ohmic contact layer and contacts to the n-type modulation doped quantum well structure. Thin capping layers are also provided to protect certain layers from oxidation. Preferably, each such etch stop layer is made sufficiently thin to permit current tunneling therethrough during operation of optoelectronic/electronic devices realized from this structure (including heterojunction thyristor devices, n-channel HFET devices, p-channel HFET devices, p-type quantum-well-base bipolar transistor devices, and n-type quantum-well-base bipolar transistor devices).In another aspect of the present invention, a high performance bipolar transistor device is realized from this structure by implanting p-type ions in a interdigitization pattern that forms a plurality of p-type ion implant regions on both sides of the p-type modulation doped quantum well structure to a depth that penetrates the n-type ohmic contact layer. The interdigitization pattern of the p-type implants reduces capacitance between the p-type modulation doped quantum well structure and the n-type ohmic contact layer to enable higher frequency operation.
REFERENCES:
patent: 3919656 (1975-11-01), Sokal et al.
patent: 4424525 (1984-01-01), Mimura
patent: 4658403 (1987-04-01), Takiguchi et al.
patent: 4683484 (1987-07-01), Derkits, Jr.
patent: 4806997 (1989-02-01), Simmons et al.
patent: 4814774 (1989-03-01), Herczfeld
patent: 4827320 (1989-05-01), Morkoc et al.
patent: 4829272 (1989-05-01), Kameya
patent: 4899200 (1990-02-01), Shur et al.
patent: 4949350 (1990-08-01), Jewell et al.
patent: 5010374 (1991-04-01), Cooke et al.
patent: 5105248 (1992-04-01), Burke et al.
patent: 5202896 (1993-04-01), Taylor
patent: 5288659 (1994-02-01), Koch et al.
patent: 5337328 (1994-08-01), Lang et al.
patent: 5386128 (1995-01-01), Fossum et al.
patent: 5422501 (1995-06-01), Bayraktaroglu
patent: 5436759 (1995-07-01), Dijaili et al.
patent: 5452118 (1995-09-01), Maruska
patent: 5698900 (1997-12-01), Bozada et al.
patent: 5999553 (1999-12-01), Sun
patent: 6031243 (2000-02-01), Taylor
patent: 6043519 (2000-03-01), Shealy et al.
patent: 6479844 (2002-11-01), Taylor
patent: 6720584 (2004-04-01), Hata et al.
patent: 20020067877 (2002-06-01), Braun et al.
10-Gb/s High-Speed Monolithically Integrated photoreceiver Using InGaAs p-i-n PD and Planar Doped InAlAs/InGaAs HEMT'sby Akahori et al. IEEE Photonics Technology Letters, vol. 4, No. 7, Jul. 1992.
10-Gbit/s InP-Based High-Performance Monolithic Photoreceivers Consisting of p-i-n Photodiodes and HEMT'sby Takahata et al., IEICE Trans. Electron., vol. E83-C, No. 6 Jun. 2000.
10 Ghz Bandwidth Monolithic p-i-n Modulation-doped Field Effect Transistor Photoreceiverby Dutta et al., Appl. Phys. Lett., vol. 63, No. 15, Oct. 11, 1993.
20 Gbit/s Long Wavelength Monolithic Integrated Photoreceiver Grown on GaAsby Hurm, et al., Electronics Letters, vol. 33, No. 7, Mar. 27, 1997.
Monolithic Integrated Optoelectronic Circuitsby Berroth et al., Fraunhofer Institute for Applied Solid State Physics (IAF), Germany, IEEE 1995.
Heterojunction Field-Effect Transistor(HFET), Reprinted from Electronics Letters, vol. 22, No. 15, pp. 784-786, Jul. 17, 1986.
High Temperature Annealing of Modulation Doped GaAs/A1GaAs Heterostructures for FET Applicationsby Lee et al., 1983 IEEE/Cornell Conf. On High-Speed Semiconductor Devices & Ckts, 8/83.
Submicrometre Gate Length Scaling of Inversion Channel Heterojunction Field Effect Transistorby Kiely et al., Electronics Letters, vol. 30, No. 6 Mar. 17, 1994.
Theoretical and Experimental Results for the Inversion Channel Heterostructure Field Effect Transistorby Taylor et al., IEE Proceedings-G, vol. 140, No. 6, Dec. 1993.
Duncan Scott W.
Taylor Geoff W.
Gordon & Jacobson, PC
Opel, Inc.
The University of Connecticut
Wilson Allan R.
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