Successive-approximation-register (SAR) analog-to-digital...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S155000

Reexamination Certificate

active

06844840

ABSTRACT:
A successive-approximation-register (SAR) analog-to-digital converter (ADC) and method utilizing N three-way elements are disclosed. The SAR ADC has a SAR logic system that implements an efficient search algorithm. The search algorithm involves initializing each of N three-way elements of a digital-to-analog converter (DAC) for the SAR ADC to a middle reference voltage. Each of the N three-way elements is able to be set to one of three values: a high reference voltage, a middle reference voltage, or a low reference voltage. The search algorithm determines and sets each of the N three-way elements from the middle reference voltage to either the high reference voltage or the low reference voltage depending upon a comparison result between an analog input value of the SAR ADC and a DAC voltage value.

REFERENCES:
patent: 5428769 (1995-06-01), Glaser et al.

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