Interlayered power bus for semiconductor device

Details Interlayered power bus for semiconductor device Interlayered power bus for semiconductor device

2005-07-19

2005-07-19

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Powering

C365S051000

Reexamination Certificate

active

06920076

ABSTRACT:
A semiconductor device includes a first power pad, a second power pad, a first adjacent bus pair, and a second adjacent bus pair. The first power pad is operable to supply a first potential, and the second power pad operable to supply a second potential. The first adjacent bus pair is disposed on a first layer of the semiconductor device and connected to the first and second power pad. The second adjacent bus pair is disposed on the second layer of the semiconductor device and is connected to the first and second power pads, and is also underlying the first adjacent bus pair.

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