Plasma display device with reduced power consumption while...

Details Plasma display device with reduced power consumption while... Plasma display device with reduced power consumption while...

2005-07-05

2005-07-05

Awad, Amr A. (Department: 2675)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C315S169400

Reexamination Certificate

active

06914584

ABSTRACT:
When a priming erasure pulse Ppre is applied, weak discharge occurs between a scanning electrode and a sustaining electrode, whereas between the scanning electrode and a data electrode, opposed discharge will not occur or, if any, may occur extremely faintly, and wall charge stuck to the scanning and sustaining electrodes, therefore, is decreased in amount to such an extent that erroneous discharge may not occur in the following address period Ta, so that the data electrode has positive-polarity wall charge left unreduced thereon or has a relatively large amount of wall charge left as stuck thereto, as a result, a sufficient level of write-in discharge can be generated even with a low value of the data voltage Vd.

REFERENCES:
patent: 5745086 (1998-04-01), Weber
patent: 6020687 (2000-02-01), Hirakawa et al.
patent: 6037916 (2000-03-01), Amemiya
patent: 6603447 (2003-08-01), Ito et al.
patent: 2000-305510 (2000-11-01), None

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