Method and apparatus for erasing memory

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185330, C365S185180, C365S218000, C365S185270, C365S185010

Reexamination Certificate

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06842380

ABSTRACT:
The present invention provides a method and apparatus for erasing memory blocks. The apparatus includes a first plurality of memory cells formed in a substrate and a second plurality of memory cells formed in the substrate. The apparatus further includes a bias circuit adapted to provide an erasing voltage differential to the first plurality of memory cells and a compensating voltage differential to the second plurality of memory cells, wherein the erasing voltage differential is larger than the compensating voltage differential.

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patent: 6345367 (2002-02-01), Sinclair
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