Methods for stacking wire-bonded integrated circuit dice on...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S108000, C438S113000

Reexamination Certificate

active

06869826

ABSTRACT:
An inventive electronic device, such as a multi-chip module (MCM), a Single In-line Memory Module (SIMM), or a Dual In-line Memory Module (DIMM), includes a base, such as a printed circuit board, having a surface on which flip-chip pads and wire-bondable pads are provided. The flip-chip pads define an area on the surface of the base at least partially bounded by the wire-bondable pads. A first integrated circuit (IC) die is flip-chip bonded to the flip-chip pads, and a second IC die is back-side attached to the first IC die and then wire-bonded to the wire-bondable pads. As a result, the flip-chip mounted first IC die is stacked with the second IC die in a simple, novel manner.

REFERENCES:
patent: 4447857 (1984-05-01), Marks et al.
patent: 4567643 (1986-02-01), Droguet et al.
patent: 4991000 (1991-02-01), Bone et al.
patent: 5008736 (1991-04-01), Davies et al.
patent: 5228192 (1993-07-01), Salatino
patent: 5252857 (1993-10-01), Kane et al.
patent: 5291064 (1994-03-01), Kurokawa
patent: 5311059 (1994-05-01), Banerji et al.
patent: 5323060 (1994-06-01), Fogal et al.
patent: 5355283 (1994-10-01), Marrs et al.
patent: 5394303 (1995-02-01), Yamaji
patent: 5399898 (1995-03-01), Rostoker
patent: 5399903 (1995-03-01), Rostoker et al.
patent: 5422435 (1995-06-01), Takiar et al.
patent: 5434745 (1995-07-01), Shokrgozar et al.
patent: 5436203 (1995-07-01), Lin
patent: 5467253 (1995-11-01), Heckman et al.
patent: 5468999 (1995-11-01), Lin et al.
patent: 5495398 (1996-02-01), Takiar et al.
patent: 5502289 (1996-03-01), Takiar et al.
patent: 5508561 (1996-04-01), Tago et al.
patent: 5514907 (1996-05-01), Moshayedi
patent: 5527740 (1996-06-01), Golwalkar et al.
patent: 5696031 (1997-12-01), Wark
patent: 5923955 (1999-07-01), Wong
patent: 5973403 (1999-10-01), Wark
patent: 6071754 (2000-06-01), Wark
patent: 6140149 (2000-10-01), Wark
patent: 6165815 (2000-12-01), Ball
patent: 6337227 (2002-01-01), Ball
patent: 6399416 (2002-06-01), Wark
patent: 6605489 (2003-08-01), Wark

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods for stacking wire-bonded integrated circuit dice on... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods for stacking wire-bonded integrated circuit dice on..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods for stacking wire-bonded integrated circuit dice on... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3407332

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.